Graph-Optimization Techniques for IC Layout and Compaction.
Gershon KedemHiroyuki WatanabePublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1984)
Keyphrases
- graph layout
- graph theory
- graph representation
- integrated circuit
- bipartite graph
- graph structure
- equivalence classes
- graph partitioning
- semi supervised
- stable set
- random graphs
- graph theoretic
- optimization problems
- spanning tree
- graph mining
- directed acyclic graph
- weighted graph
- optimization methods
- random walk
- social networks