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A wide-bandwidth low-voltage PLL for PowerPC microprocessors.

Jose AlvarezHector SanchezGianfranco GerosaRoger Countryman
Published in: IEEE J. Solid State Circuits (1995)
Keyphrases
  • low voltage
  • design considerations
  • power line
  • operating system
  • computing power
  • cmos technology
  • power management
  • image sequences
  • pattern recognition
  • low power