Iterative floating point computation using FPGA DSP blocks.
Fredrik BrosserHui Yan CheahSuhaib A. FahmyPublished in: FPL (2013)
Keyphrases
- floating point
- square root
- floating point arithmetic
- signal processing
- verilog hdl
- digital signal processing
- fixed point
- real time image processing
- systolic array
- high speed
- instruction set
- field programmable gate array
- low power
- hardware implementation
- interval arithmetic
- digital signal processor
- digital signal
- fast fourier transform
- sparse matrices