A hardware architecture design for interference rejection of ultrasound signals based on FPGA.
Yuxuan LinHuangxu ChenZhaohui WuPublished in: CIPAE (2023)
Keyphrases
- hardware implementation
- field programmable gate array
- signal processing
- hardware architecture
- parallel hardware
- low cost
- radio frequency
- hardware design
- software implementation
- dedicated hardware
- fpga implementation
- single chip
- hardware architectures
- real time
- ultrasound images
- received signal
- digital signal
- embedded systems
- digital signal processing
- weak signal detection
- spectrum sensing
- hardware and software
- programmable logic
- fpga technology
- reconfigurable hardware
- low power consumption
- direct sequence spread spectrum
- image processing algorithms
- data acquisition
- high speed
- fpga device
- parallel architecture
- frequency hopping
- parallel computing
- xilinx virtex
- image processing
- real time image processing
- hardware description language
- signal acquisition
- efficient implementation
- computing systems
- computer systems
- digital signal processors
- fpga hardware
- hardware software
- multipath
- eeg signals
- hardware software co design
- massively parallel
- gate array