A Very Low Cost BCH Decoder for High Immunity of On-Chip Memories.

Haejun Seo Sehwan Han Yoonseok Heo Taewon Cho

Published in: FGIT-GDC/CA (2010)

Keyphrases

low cost
low power consumption
wide range
single chip
reed solomon
low power
real time
high speed
digital camera
embedded systems
low complexity
associative memory
multi objective optimization
error correction
image sensor
physical design