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INTEGRA: fast multi-bit flip-flop clustering for clock power saving based on interval graphs.
Iris Hui-Ru Jiang
Chih-Long Chang
Yu-Ming Yang
Evan Y.-W. Tsai
Lancer S.-F. Chen
Published in:
ISPD (2011)
Keyphrases
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power saving
power consumption
flip flops
power dissipation
low power
energy saving
energy efficiency
cmos technology
power reduction
data center
wireless communication
image processing
scheduling algorithm
master slave
multi threaded