An Efficient SIMD Implementation of the H.265 Decoder for Mobile Architecture.
Massimo BarianiPaolo LambruschiniMarco RaggioLuca PezzoniPublished in: ICIAP Workshops (2015)
Keyphrases
- layered architecture
- single instruction multiple data
- fpga implementation
- mobile devices
- architectural design
- hardware implementation
- management system
- design considerations
- parallel algorithm
- low complexity
- mobile learning
- parallel processing
- hardware architecture
- instruction set
- processor array
- fpga technology
- vlsi architecture
- parallel implementation
- software implementation
- platform independent
- parallel architecture
- parallel computers
- efficient implementation
- vlsi implementation
- highly parallel
- array processor