A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Design for Low Power Application.
Alok Kumar MishraUrvashi ChopraD. VaithiyanathanPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
- high frequency
- low power
- power dissipation
- single chip
- low frequency
- ultra low power
- power consumption
- cmos technology
- vlsi architecture
- low cost
- high speed
- low power consumption
- logic circuits
- digital signal processing
- high resolution
- gate array
- visual quality
- subband
- mixed signal
- design methodology
- discrete wavelet transform
- flip flops
- multiscale
- design process