An FPGA based low power multiplier for FFT in OFDM systems using precomputations.
Mokhtar AboelazePublished in: ICTC (2013)
Keyphrases
- low power
- ofdm system
- floating point
- hardware implementation
- power consumption
- low cost
- estimation algorithm
- high speed
- wireless communication
- multipath
- bit error rate
- fading channels
- frequency domain
- application specific
- logic circuits
- vlsi architecture
- signal to noise ratio
- embedded systems
- computer simulation
- signal processing
- image processing algorithms
- mixed signal
- real time
- computationally efficient