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A Heterogeneous HEVC Video Encoder System Based on Two-Level CPU-FPGA Computing Architecture.
Yudi Qiu
Jie Jiao
Yuxin Tang
Yanwei Liu
Jianyu Ren
Xiaoyang Zeng
Yibo Fan
Published in:
ASICON (2021)
Keyphrases
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video encoder
video compression
low complexity
video codec
hardware implementation
real time
video coding
data compression
motion compensation
motion estimation
high speed
signal processing
video conferencing
rate distortion
real time video
low bit rate