A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach.
Hui-Chin TsengHsin-Hung OuChi-Sheng LinBin-Da LiuPublished in: ISLPED (2004)
Keyphrases
- low power
- high speed
- single chip
- analog to digital converter
- power consumption
- low cost
- high power
- real time
- logic circuits
- digital signal processing
- low power consumption
- vlsi circuits
- image sensor
- vlsi architecture
- mixed signal
- wireless transmission
- spatially varying
- power reduction
- delay insensitive
- wireless networks
- gate array