Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures.
Lyonel BarthePascal BenoitLionel TorresPublished in: FPL (2010)
Keyphrases
- instruction set
- parallel architectures
- computation intensive
- multi core processors
- application specific
- high speed
- floating point
- computer architecture
- human visual system
- single processor
- memory management
- countermeasures
- parallel processing
- smart card
- single chip
- image quality
- single instruction multiple data
- information loss
- memory hierarchy
- empirically derived
- neural network
- real time
- processing elements
- hardware architecture
- high end
- power analysis
- low power consumption
- information security
- low cost