A Parallel Array Architecture of MIMO Feedback Network and Real Time Implementation.
Yong KimHong JeongPublished in: KES (1) (2005)
Keyphrases
- real time
- packet switched
- dedicated hardware
- vlsi architecture
- parallel architecture
- parallel implementation
- graphics processing units
- processor array
- mobile telecommunications
- layered architecture
- hardware implementation
- computer networks
- network architecture
- computing platform
- pipelined architecture
- activity monitoring
- fpga technology
- shared memory
- graphic processing unit
- master slave
- single instruction multiple data
- network traffic
- distributed processing
- texas instruments
- vlsi implementation
- computer architecture
- parallel computing
- communication protocol
- network structure
- packet switching
- parallel processing
- fpga device
- distributed memory
- instruction set
- multimedia communication
- local area network
- parallel computers
- content addressable memory
- processing elements
- xilinx virtex
- multi core processors
- hardware architecture
- low power
- communication networks
- peer to peer