A 56GS/S 6b DAC in 65nm CMOS with 256×6b memory.
Yuriy M. GreshishchevDaniel PollexShing-Chi WangMarinette BessonPhilip FlemekeStefan SzilagyiJorge AguirreChris FaltNaim Ben-HamidaRobert GibbinsPeter SchvanPublished in: ISSCC (2011)
Keyphrases
- cmos technology
- random access memory
- silicon on insulator
- nm technology
- high speed
- power consumption
- low cost
- memory usage
- metal oxide semiconductor
- memory requirements
- limited memory
- vlsi circuits
- power dissipation
- analog vlsi
- main memory
- low power
- computing power
- memory space
- low memory
- memory management
- data sets
- low voltage
- memory size
- database
- circuit design
- computational power
- max csp
- embedded dram