Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.
Alessandro ValleroSotiris TselonisNikos FoutrisManolis KaliorakisMaha KooliAlessandro SavinoGianfranco PolitanoAlberto BosioGiorgio Di NataleDimitris GizopoulosStefano Di CarloPublished in: Microprocess. Microsystems (2015)