A compact low-power eDRAM-based NoC buffer.

Cheng Li Paul Ampadu

Published in: ISLPED (2015)

Keyphrases

low power
low cost
high speed
power consumption
cmos technology
single chip
high power
wireless transmission
low power consumption
vlsi circuits
network on chip
mixed signal
image sensor
digital signal processing
power dissipation
routing algorithm
logic circuits
vlsi architecture
delay insensitive