Transistor level automatic layout generator for non-complementary CMOS cells.

Adriel Ziesemer Cristiano Lazzari

Published in: VLSI-SoC (2007)

Keyphrases

high speed
metal oxide semiconductor
low power
integrated circuit
power consumption
low cost
circuit design
power supply
semi automatic
fully automatic
neural network
natural images
higher level
lower level
image processing
levels of abstraction
layout design
learning algorithm