A defect-tolerant systolic array implementation for real time image processing.

V. Hecht Karsten Rönner Peter Pirsch

Published in: J. VLSI Signal Process. (1993)

Keyphrases

real time image processing
systolic array
parallel architecture
efficient implementation
reconfigurable architecture
image processing
embedded systems
implementation details
data sets
decision trees
image segmentation
probabilistic model
hardware implementation
parallel implementation