A low-power precomputation-based fully parallel content-addressable memory.
Chi-Sheng LinJui-Chuan ChangBin-Da LiuPublished in: IEEE J. Solid State Circuits (2003)
Keyphrases
- low power
- high speed
- content addressable memory
- low cost
- power consumption
- single chip
- mixed signal
- shared memory
- vlsi circuits
- real time
- digital signal processing
- cmos technology
- logic circuits
- vlsi architecture
- parallel processing
- power dissipation
- parallel programming
- power reduction
- energy efficiency
- general purpose
- image processing