FPGA hardware architecture for stereoscopic image compression based on block matching, watermarking and hamming code.
Ghattas AkkadMoustapha El HassanRafic AyoubiPublished in: IPAS (2016)
Keyphrases
- block matching
- image compression
- fpga hardware
- hardware design
- motion vectors
- motion estimation
- video compression
- motion compensation
- optical flow
- compression ratio
- real time
- fpga technology
- disparity estimation
- vector quantization
- wavelet transform
- low bit rate
- three dimensional
- digital images
- video sequences
- motion field
- stereoscopic video
- watermarking algorithm
- block size
- high definition
- hierarchical block matching
- inter frame
- message passing
- compression algorithm
- efficient implementation
- motion model
- subband
- bit rate
- multiresolution