Login / Signup
Low-power area-efficient delay element with a wide delay range.
Jidan Al-Eryani
Alexander Stanitzki
Karsten Konrad
Nima Tavangaran
Dieter Brückmann
Rainer Kokozinski
Published in:
ICECS (2012)
Keyphrases
</>
low power
power dissipation
low cost
power consumption
high speed
logic circuits
digital signal processing
cmos technology
single chip
vlsi architecture
low power consumption
power reduction
wireless transmission
vlsi circuits
signal processor