A scalable parallel reconfigurable hardware architecture for DNA matching.

Edgar J. Garcia Neto Segundo Nadia Nedjah Luiza de Macedo Mourelle

Published in: LASCAS (2013)

Keyphrases

hardware architecture
hardware implementation
field programmable gate array
processing elements
parallel computing
hardware architectures
image matching

efficient implementation
matching algorithm
low cost
massively parallel
parallel architecture
signal processing
parallel processing

parallel architectures
shared memory
computer architecture
parallel computation
dna computing
image processing algorithms

distributed memory
dna sequences
pairwise
computer vision
xilinx virtex
real time