Statistical Design of a Multiplier using a Low Power Square-Law CMOS Analog Cell.
Tuna B. TarimMohammed IsmailH. Hakan KuntmanPublished in: SBCCI (1998)
Keyphrases
- low power
- mixed signal
- vlsi architecture
- single chip
- power consumption
- low cost
- high speed
- cmos image sensor
- cmos technology
- vlsi circuits
- low power consumption
- logic circuits
- analog to digital converter
- power dissipation
- image sensor
- digital signal processing
- ultra low power
- multi channel
- gate array
- high power
- power reduction
- wireless transmission
- nm technology
- circuit design
- real time
- signal processor
- power management
- dynamic range