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Design of a Coarse-Grained Processing Element for Matrix Multiplication on FPGA.

Yuichi OkuyamaShigeyuki TakanoTokimasa Shirai
Published in: MCSoC (2014)
Keyphrases
  • coarse grained
  • fine grained
  • matrix multiplication
  • machine learning
  • parallel algorithm
  • design patterns
  • hardware architecture