An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing.
Dingbang LiuHaoxiang ZhouWei MaoJun LiuYuliang HanChanghai ManQiuping WuZhiru GuoMingqiang HuangShaobo LuoMingsong LvQuan ChenHao YuPublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2022)
Keyphrases
- compute intensive
- parallel implementation
- parallel hardware
- wireless sensor networks
- memory requirements
- sensor networks
- bit parallel
- computer architecture
- distributed shared memory
- parallel computers
- cellular neural networks
- memory space
- parallel processing
- hash table
- random access memory
- parallel computing
- energy efficient
- main memory
- field programmable gate array
- distributed memory
- random access
- computing power
- processing elements
- virtual memory
- memory footprint
- level parallelism
- multicore processors
- processor core