The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches.
David TarjanKevin SkadronPublished in: SC (2010)
Keyphrases
- memory access
- real time
- low cost
- memory management
- memory subsystem
- main memory
- vlsi implementation
- data access
- memory hierarchy
- multithreading
- processor core
- high speed
- computing power
- external memory
- processing units
- memory bandwidth
- hardware and software
- programmable logic
- instruction set
- ibm power processor
- single chip
- ibm zenterprise
- memory space
- random access memory
- computational power
- operating system
- parallel hardware
- traffic flow
- internal memory
- cache misses
- host computer
- image sequences
- processing elements
- particle filter
- high bandwidth
- circuit design
- image sensor
- shared memory
- chip design
- computing systems
- memory requirements
- power consumption
- mean shift
- digital signal processors
- speculative execution