Memory-Efficient High-Speed Implementation of Kyber on Cortex-M4.

Leon Botros Matthias J. Kannwischer Peter Schwabe

Published in: IACR Cryptol. ePrint Arch. (2019)

Keyphrases

memory efficient
high speed
external memory
low power
information processing
multiple sequence alignment
implementation issues
implementation details
frame rate
decision making
neural network
real time
database
parallel implementation
information systems
genetic algorithm
data sets