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A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology.

Sabavat Satheesh KumarKumaravel SundaramSanjeevikumar PadmanabanJens Bo Holm-NielsenFrede Blaabjerg
Published in: IET Circuits Devices Syst. (2021)
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