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Balancing the Interconnect Topology for Arrays of Processors between Cost and Power.
Esther Y. Cheng
Feng Zhou
Bo Yao
Chung-Kuan Cheng
Ronald L. Graham
Published in:
ICCD (2002)
Keyphrases
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total energy
parallel algorithm
high speed
power consumption
parallel processing
high cost
multithreading
interconnection networks
cost sensitive
total cost
power dissipation
topology preserving
high end
cost reduction
multiprocessor systems
clock frequency