An 800-MHz 1-μm CMOS pipelined 8-b adder using true single-phase clocked logic-flip-flops.
Robert RogenmoserQiuting HuangPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- flip flops
- single phase
- power dissipation
- low power
- power supply
- power consumption
- cmos technology
- data flow
- input output
- high speed
- control algorithm
- logic circuits
- low cost
- control method
- pulse width modulation
- induction motor
- multiple input
- active power filter
- nm technology
- parameter tuning
- digital signal processing
- neural network
- neural network model
- signal processing
- image processing