Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology.
Koushik K. DasRichard B. BrownPublished in: VLSI Design (2003)
Keyphrases
- silicon on insulator
- cmos technology
- design methodologies
- power dissipation
- design methodology
- low power
- high speed
- power consumption
- low voltage
- ibm power processor
- multiagent systems
- design process
- mixed signal
- digital signal processing
- fuzzy neural network
- signal processing
- parallel processing
- image processing
- finite state machines
- formal specification
- image sensor
- pattern recognition