High-speed FPGA-based implementations of a Genetic Algorithm.
Michalis VavourasKyprianos PapadimitriouIoannis PapaefstathiouPublished in: ICSAMOS (2009)
Keyphrases
- high speed
- genetic algorithm
- low power
- hardware architectures
- neural network
- fitness function
- hardware implementation
- artificial neural networks
- frame rate
- real time
- mutation operator
- ant colony optimization
- metaheuristic
- multi objective optimization
- simulated annealing
- fuzzy logic
- multi objective
- multi population
- database
- hardware software partitioning
- high speed networks
- hybrid genetic algorithm
- software implementation
- hardware architecture
- encoding scheme
- job shop scheduling problem
- application specific
- efficient implementation
- optimization method
- genetic algorithm ga
- optimal solution
- databases
- data sets