An STT-MRAM Based in Memory Architecture for Low Power Integral Computing.
Yinglin ZhaoPeng OuyangWang KangShouyi YinYouguang ZhangShaojun WeiWeisheng ZhaoPublished in: IEEE Trans. Computers (2019)
Keyphrases
- low power
- vlsi architecture
- power consumption
- low cost
- design considerations
- high speed
- nm technology
- mixed signal
- single chip
- random access memory
- cmos technology
- power dissipation
- wireless transmission
- high power
- low power consumption
- memory access
- memory management
- image sensor
- signal processor
- vlsi circuits
- power management
- analog to digital converter
- low complexity
- associative memory
- real time
- gate array
- cmos image sensor
- computational power
- digital signal processing
- hardware implementation
- delay insensitive
- design methodology
- storage devices
- vlsi implementation