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A logarithmic response CMOS image sensor with on-chip calibration.
Spyros Kavadias
Bart Dierickx
Danny Scheffer
Andre Alaerts
Dirk Uwaerts
Jan Bogaerts
Published in:
IEEE J. Solid State Circuits (2000)
Keyphrases
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cmos image sensor
single chip
dynamic range
parallel processing
solid state
processing capabilities
low power
image enhancement
image sensor
high volume
low power consumption
image compression
high dynamic range
power consumption