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A 100 MHz two-phase four-segment DC-DC converter with light load efficiency enhancement in 0.18 μm CMOS technology.
Han Peng
David I. Anderson
Mona Mostafa Hella
Published in:
CICC (2012)
Keyphrases
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cmos technology
low voltage
low power
dc dc converter
power consumption
parallel processing
transient response
image processing
multiple output
high speed
control method
power dissipation
clock frequency
neural network
image sensor
image enhancement
low cost
digital images