FPGA based implementation of high speed tunable notch filter using pipelining and unfolding.

Sounak Samanta Mrityunjoy Chakraborty

Published in: NCC (2014)

Keyphrases

high speed
low power
information retrieval
hardware implementation
hardware design
hardware architectures
database
data sets
databases
artificial intelligence
image processing
decision trees
low cost
efficient implementation
application specific