Model Checking in a Microprocessor Design Project.
Geoff BarrettAnthony McIsaacPublished in: CAV (1997)
Keyphrases
- model checking
- formal verification
- temporal logic
- formal methods
- model checker
- temporal properties
- finite state machines
- finite state
- automated verification
- reachability analysis
- computation tree logic
- symbolic model checking
- partial order reduction
- knowledge based systems
- concurrent systems
- reactive systems
- design process