Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications.
Weiqiang LiuJiahua XuDanye WangChenghua WangPaolo MontuschiFabrizio LombardiPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2018)
Keyphrases
- low power
- error tolerant
- single chip
- low cost
- high speed
- power consumption
- low power consumption
- logic circuits
- vlsi architecture
- digital signal processing
- cmos technology
- mixed signal
- gate array
- design process
- power reduction
- power dissipation
- graph matching
- ultra low power
- computer vision
- image sensor
- object recognition
- vlsi circuits
- data mining
- real time