Integrated Coupling and Clock Frequency Assignment of Accelerators During Hardware/Software Partitioning.

Scott Sirowy Frank Vahid

Published in: IESS (2007)

Keyphrases

hardware software partitioning
clock frequency
power consumption
field programmable gate array
hw sw
feature analysis
design issues
hardware software
response time
low cost
high speed
fault tolerance
embedded systems
parallel computing
massively parallel
design space exploration