A scalable and programmable architecture for 2-D DWT decoding.

Massimo Ravasi Livio Tenze Marco Mattavelli

Published in: IEEE Trans. Circuits Syst. Video Technol. (2002)

Keyphrases

hardware architecture
processor array
software architecture
scalable distributed
multiprocessor architecture
general purpose
real time
management system
lightweight
high throughput
data flow
digital signal processors
layered architecture
hardware implementation
low cost
computational complexity
data sets