A Single Clocked Adiabatic Static Logic - A Proposal for Digital Low Power Applications.

Jouko Marjonen Markku Åberg

Published in: J. VLSI Signal Process. (2001)

Keyphrases

low power
logic circuits
high speed
low cost
mixed signal
power consumption
vlsi circuits
single chip
high power
wireless transmission
delay insensitive
low power consumption
digital signal processing
image sensor
gate array
general purpose
ultra low power
power saving
cmos technology
power dissipation