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Design and Implementation of a Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement.
Shenjie Wang
Catherine Dehollain
Published in:
IEEE Trans. Instrum. Meas. (2015)
Keyphrases
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high speed
analog to digital converter
efficient implementation
implementation issues
design process
case study
chip design
highly optimized
power dissipation
low power
power consumption
rapid prototyping
single chip
complexity analysis
parallel distributed
real time
ultra low power