A 1GS/s low-power low-kickback noise comparator in CMOS process.
Ali BaradaranrezaeiiRoozbeh AbdollahiKhayrollah HadidiAbdollah KhoeiPublished in: ECCTD (2011)
Keyphrases
- low power
- low power consumption
- power consumption
- low cost
- high speed
- high power
- energy dissipation
- single chip
- vlsi architecture
- digital signal processing
- logic circuits
- power reduction
- wireless transmission
- vlsi circuits
- noise model
- noise level
- signal to noise ratio
- mixed signal
- gate array
- image sensor
- cmos technology
- gaussian noise
- real time
- power saving
- file system