A Reconfigurable Systolic Torus for Iterative Matrix Operations.

Theodore Kaskalis Konstantinos G. Margaritis

Published in: Parallel Algorithms Appl. (1996)

Keyphrases

systolic array
reconfigurable architecture
rows and columns
matrix multiplication
general purpose
low cost
data flow
singular value decomposition
low rank
hardware implementation
singular values
learning algorithm
sparse matrix
interconnection networks