A novel multiply multiple accumulator component for low power PDSP design.

Vijay Sundararajan Keshab K. Parhi

Published in: ICASSP (2000)

Keyphrases

low power
power consumption
single chip
low power consumption
low cost
high speed
logic circuits
vlsi architecture
gate array
cmos technology
design process
high power
power dissipation
hough transform
error correction
image compression
general purpose