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Efficient timing analysis for CMOS circuits considering data dependent delays.

Shangzhi SunDavid Hung-Chang DuHsi-Chuan Chen
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
  • data dependent
  • high speed
  • delay insensitive
  • circuit design
  • low cost
  • analog vlsi
  • query processing
  • higher order
  • learning algorithm
  • denoising
  • risk bounds