An O(n) Parallel Shortest Path Algorithm and Its Hardware Implementation.
Jaehwan John LeeXiang XiaoPublished in: CDES (2010)
Keyphrases
- hardware implementation
- shortest path algorithm
- shortest path
- parallel architecture
- processing elements
- efficient implementation
- pipelined architecture
- signal processing
- software implementation
- optimal solution
- dedicated hardware
- hardware architecture
- field programmable gate array
- hardware design
- minimum cost flow
- memory management
- fpga implementation
- parallel processing
- pipeline architecture
- image processing algorithms
- fpga device
- shared memory
- image processing
- parallel computing
- parallel implementation
- parallel architectures
- image binarization
- fpga technology