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Architectural exploration of a fine-grained 3D cache for high performance in a manycore context.

Eric GuthmullerIvan Miro PanadesAlain Greiner
Published in: VLSI-SoC (2013)
Keyphrases
  • fine grained
  • coarse grained
  • access control
  • tightly coupled
  • massively parallel
  • user intent
  • embedded processors
  • data lineage
  • data model
  • data access