Design techniques for low power high bandwidth upconversion in CMOS.
Carl De RanterMichiel SteyaertPublished in: ISLPED (2002)
Keyphrases
- low power
- single chip
- power consumption
- high speed
- low cost
- low power consumption
- cmos technology
- vlsi architecture
- high bandwidth
- ultra low power
- logic circuits
- power dissipation
- mixed signal
- digital signal processing
- nm technology
- vlsi circuits
- gate array
- power reduction
- delay insensitive
- circuit design
- low latency
- multi channel
- cmos image sensor
- wireless communication
- data management
- real time