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Design of area efficient VLSI architecture for carry select adder using logic optimization technique.
Bala Sindhuri Kandula
Padma Vasavi Kalluru
Santi Prabha Inty
Published in:
Comput. Intell. (2021)
Keyphrases
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vlsi architecture
vlsi implementation
low complexity
low power
logic circuits
neural network
computationally efficient
computer vision
building blocks
power consumption
real time
video sequences